1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device in which a POL signal from a timing controller is stabilized without using a regulator.
2. Discussion of the Related Art
Demands for various display devices have increased with development of an information society. Accordingly, efforts have been made to research and develop various flat display devices such as liquid crystal display (LCD), plasma display panel (PDP), electroluminescent display (ELD), and vacuum fluorescent display (VFD). Some species of flat display devices have already been used as displays for different types of equipment.
Among the various flat display devices, liquid crystal display (LCD) devices have been widely used due to their advantageous characteristics of high picture quality, thin profile, lightness in weight, and low power consumption. As a result, the LCD devices are a substitute for Cathode Ray Tubes (CRTs). In addition to mobile type LCD devices such as a display for a notebook computer, LCD devices have been developed for computer monitors and televisions to receive and display broadcasting signals.
Despite various technical developments in the LCD technology having applications in different fields, research in enhancing the picture quality of the LCD device has been, in some respects, lacking as compared to other features and advantages of the LCD device.
In order to use LCD devices in various fields as a general display, one of the keys to developing such LCD devices depends on whether the LCD device can implement a high quality picture such as high resolution and high luminance with a large-sized screen while maintaining lightness in weight, thin profile, and low power consumption.
A general LCD device includes an LCD panel for displaying images, and a driver for applying a driving signal to the LCD panel. The LCD panel generally includes first and second substrates bonded to each other with a certain space therebetween, and a liquid crystal layer formed between the first and second substrates by injection.
The first substrate (TFT array substrate) according to a related art includes a plurality of gate lines arranged along a first direction at fixed intervals, a plurality of data lines arranged along a second direction perpendicular to the first direction at fixed intervals, a plurality of pixel electrodes formed in a matrix arrangement at pixel regions where the gate lines cross the data lines, and a plurality of thin film transistors (TFTs) switched by signals of the gate lines to transfer signals of the data lines to each pixel electrode.
The second substrate (color filter substrate) according to a related art includes a black matrix layer that shields light from certain portions except the pixel regions, R/G/B color filter layers for displaying various colors, and a common electrode for producing the image.
The common electrode is supplied with a common voltage signal generated from a common voltage generator. In case of a line inversion LCD device, the common voltage signal has an alternating current type inverted per horizontal period. At this time, the common voltage signal is generated by a POL signal from a timing controller. In more detail, a driver of a related art LCD device will be described below with reference to FIG. 1.
FIG. 1 illustrates a driver of a related art LCD device. Referring to FIG. 1, a direct current (DC)-to-DC converter 101 is supplied with an input voltage VCC from a system 100 and boosts or decompresses the input voltage VCC to output a reference voltage VDD, a high gate voltage VGH, and a low gate voltage VGL. The reference voltage VDD is supplied to a regulator 102. The regulator 102 stabilizes the reference voltage VDD and supplies the stabilized reference voltage VDD to a timing controller 103 as a power source. The timing controller 103 generates a POL signal using the stabilized reference voltage VDD and supplies the POL signal to a common voltage generator 104. The common voltage generator 104 inverts and amplifies the received POL signal.
The regulator 102 supplies the power source (stabilized reference voltage VDD) to the timing controller 103 to operate the timing controller 103. At this time, since the reference voltage output from the regulator 102 is a constant voltage, the POL signal is stably output from the timing controller 103. If the input voltage VCC from the system 100 is supplied to the timing controller 103 without the regulator 102, the POL signal output from the timing controller 103 is easily varied depending on the input voltage VCC from the system 100. If the POL signal is varied, a common voltage signal VCOM generated by the POL signal is also varied, which is a problem.
To prevent the common voltage signal VCOM from being varied, the LCD device is provided with the regulator 102. However, a problem arises in that the regulator 102 is expensive and increases the overall cost of the LCD device.